Instrumentation of twin-MCMs based mutual-test

In semiconductor manufacturing, it is highly recommended to fully test a die in a socket before packaging and assembling it onto a circuit board to preserve its functional integrity. Currently, the existing testing methods are limited and cover mostly the V/I signal on the pins. As a result, there is an urgent need to develop more effective testing strategies capable of covering signals on the data, address and control buss. In addition, manufacturing defects like nets and pins-related discontinuities also have significant negative impacts on signal integrity, especially at high speed. To overcome these challenges, smart Multi-Chip Modules (MCMs) have been developed. Generally, MCMs possess self-test capabilities to minimize impedance mismatch, propagation delay and the effects of other shortcomings induced by the manufacturing defects.

Recently, the semiconductor industry has embarked on 3D packaging, which can only be achieved if the packages are made of Known-Good-Die (KGD) instead of the conventional miniaturized PCB. KGD is a term used to describe a fully tested die without defectives at the input/output pin prior to assembly. Unlike PCB, which is loaded with known integrated circuits, MCM is composed of unknown dice. Thus, standardizing MCM per PCB under boundary scan test (BST) requires standardization of the BST test from PCB to MCM followed by validation through boundary scan diagnostic. For paired MCMs, substrate and imposer play a fundamental role in running self or mutual test of the twin owing to their ability to sense each other’s boundary scan cells interactively. Unfortunately, some dice have their boundary-scan cells mixed with linkage bits at the general-purpose input/outputs, which may limit their capability to detect manufacturing defects. Therefore, KGD needs evolutionary changes through modern technology to enhance the efficiency of the probing test approaches.

To address these issues, Dr. Wang Shun Shen Peter, Dr. Wang Yin-Tien, Dr. Chao Choung-Lii and Dr. Yang Wei-Bin from Tamkang University explored the instrumentation of twin-MCM based mutual test. In particular, they proposed advanced data collection strategies using boundary scan-based vector analysis, developed to debug manufacturing defects such as joint test action based group (JTAG) compliant dice commonly associated with ICs based cells. In their approach, a switch attached to the motherboard was used to temporarily link the two MCMs under mutual test, with the ability to release either of them for self-test. Moreover, the boundary scan cells were designed to follow registering instructions, including data, user-defined codes, bypass and instruction, to sense through their interconnected codes. Their work is currently published in the research Microelectronics Journal.

The authors findings show that the approach helped arrange the identically designed MCMs, thus providing solutions to unknown dice. This enhanced their capacity to diagnose possible dice flaws caused by various manufacturing defectives like thermal stresses ion substrates and hot or cold soldering of the bumps. Furthermore, the present system could be used to repair the problems associated with MCMs after the validation of KGD that was made possible by troubleshooting the twin-MCM via both mutual and self-testing.

In summary, advanced data collection techniques for troubleshooting twin-MCMs based on mutual and self-testing was reported in this study. This approach enables synchronous testing of twin-MCM with boundary scan compatible cells and asynchronous testing of forbidden linkage bits of the boundary cells via tandem and simplex mode-based cluster test, respectively. The authors established the possible advancement of MCMs with or without KGD. In a statement to Advances in Engineering, Dr. Wang Shun Shen Peter, first author explained that their study findings would advance the design of high-performance MCM and further evolution of the back-end semiconductor industry in tandem with the front-end.